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P. Swaminathan , 2012. Verification and Validation Methodology for Safety Critical Embedded Systems. Journal of Artificial Intelligence, 5: 214-220.
DOI: 10.3923/jai.2012.214.220
URL: https://scialert.net/abstract/?doi=jai.2012.214.220
DOI: 10.3923/jai.2012.214.220
URL: https://scialert.net/abstract/?doi=jai.2012.214.220