Information Technology Journal

1812-5638 1812-5646

Asian Network for Scientific Information

10.3923/itj.2013.2382.2389

Wei

Jiang

Jian-Guo

Liu

12 2013

12 12 A simple equivalent circuit of multilevel inverters to predict the deviation of node voltages was analyzed and the capacitor voltage imbalance mechanism of diode clamped multilevel inverter was analyzed. An optimization algorithm of Space Vector Pulse Width Modulation (SVPWM) for capacitor voltage balance of diode clamped multilevel inverters is presented. This algorithm predicts the deviation of node voltages for different operation modes to develop an optimization algorithm to minimize the voltage deviation among different capacitors. This algorithm selects the best switch combinations during each switching cycle to reach node voltage balance. This algorithm is naturally applicable to inverters with an arbitrary number of levels. The simulation and experimental results verify the correctness of this algorithm.

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