Asian Journal of Scientific Research1992-14542077-2076Asian Network for Scientific Information10.3923/ajsr.2014.248.255SubramaniS. Hari Hara RajeshK.S.S.K. ElamaranV. 2201472The importance of adder sub-systems are well known by every designers and engineers.
Hence the engineers are still doing research with them by incorporating novel
design techniques to speed up the circuit along with power reduction. Adder
logic-cells are used in many applications like within a microprocessors, digital
signal processors, etc., especially where the digital data is being processed.
A Complementary Metal Oxide Semiconductor (CMOS) design techniques are implemented
here with different logic styles. We implement some novel design ideas which
will have less number of transistors along with variable length and width of
the transistors to implement the addition. Reduction of clock frequency, supply
voltage and the load capacitance are the pertinent techniques to reduce the
dynamic power dissipation. Methods like clock gating, transistors with high
thresholds, increasing the length of the transistors are few techniques to reduce
the static power dissipation. We simulate our adder logic-cell designs using
DSCH (Digital Schematic) Computer Aided Design (CAD) tool. A Microwind which
is a Layout Editor tool is used to acquire better results of power dissipation
and they are compared along with the conventional CMOS logic, Pass-transistor
logic, Transmission-gate logic styles. We conclude pass-transistor logic based
results are better as compared to the other designs. All simulation results
are made using 90 nm foundry technology libraries using Microwind software tool.
Our work will be further extended by designing novel XOR/XNOR circuits for the
improvement of power reduction of the adder logic-cells.]]>Chandrakasan, A.P. and R.W. Broderson,1995Peiravi, A., F. Moradi and D.T. Wisland,20099392396Yeap, G.K.,1998Pages: 233Pages: 233Hu, J., X. Yu and J. Chen,20111021612167Haghparast, M. and K. Navi,2007739954000Priya, M.G., K. Baskaran, D. Krishnaveni and S. Srinivasan,20125227232Weste, N.H.E.,20063rd Edn.,Reddy, N.S.S.,20114657662Kang, S.M. and Y. Leblebici,20033rd Edn.,Vigneswaran, T., B. Mukundhan and P.S. Reddy,2006619781981Vigneswaran, T. and P.S. Reddy,2006629362939Elamaran, V. and H.N. Upadhyay,2013515121519Elamaran, V., N.B.P. Reddy and K. Abhiram,20122012pp: 1619