Research Article
Overview of Radiation Hardening Techniques for IC Design

Citation to this article as recorded by ASCI
Gu, F., C. Ling, J. Kuang and Y. Zhou, 2012. Fault tolerance structure of radix 2 signed digital adders. Inform. Technol. J., 11: 1442-1448.
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V. Elamaran and H.N. Upadhyay, 2015. CMOS VLSI design of low power SRAM cell architectures with new TMR: a layout approach. Asian J. Sci. Res., 8: 466-477.
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