Abstract: Coronary artery disease still remains the main cause of death. The existence of silent myocardial isocheim emphasized the need for All-day real-time monitoring. Therefore patient monitoring during normal activity has become increasingly important as a standard preventive craniological procedure for detection of cardiac Arrhythmias, transient ischemic episodes and silent myocardial ischemia. This paper deals the design and implementation of a Dual-mode, (700 m) Wireless Real-time Arrhythmias monitoring and Auto-warning System. The system consists of slave node, and master node with a PC-based Application user interface. The system operates at the license-free open frequency band 915 MHZ. The slave node is a DSP-based smart board carried by the patient; it acquires two channels of full-spectrum ECG, stores samples on a Flash memory capable of handling 1GBits of data, compress and transmits a digitally-processed cardiac heart signal each time with detected QRS synchronous pulses as transmission data packet. The master node is responsible for receiving, decompressing, and analyzing the transmitted data packets. The SRWF-501F915 integrated module realizes the data transmitting and receiving. The developed system can be configured as master-slave or Stand-Alone topology.
INTRODUCTION
Diagnosing and continuous monitoring of cardiac arrhythmias during day activity (ICU-outdoor) would be beneficial for medical practitioners for proper and better treatment, at the same time it provides a safety net for documenting, and it is useful for health care providers to improve management of the disease (Shah et al., 1998). So there is an ever increasing demand for Distance real-time, continuous monitoring of cardiac arrhythmias.
Although many diagnostic technologies use similar techniques to monitor numerous physiological data have been available, such as BlueMedica (Kostelnik et al., 2001), Real time Portable Heart Monitoring (Jovanov, 2000), Wireless ECG (Kant, 2002), Remote Arrhythmia Monitoring System (NASA, 2005), Wireless ECG Monitoring by Telephone (Orlov et al., 2001), Real-Time Continuous Cardiac Arrhythmias Detection System (Zhoul et al., 2005), but most of these technologies rely on either off-line processing, high power consumption, high cost, short distance, or fully equipped with expensive backbones, such telephone lines, web-based and GPS.
The system presented in this research is able to detects, classifies, displays, compress, stores and transmits the arrhythmias data samples and informs the patient and the physician with a short warning messages or treatment plan, using an advanced low cost design, low power consumption and high accuracy methodologies. Due to the system complexity; Building Blocks design methodology was used, and the system has been broken into several tasks blocks.
MATERIALS AND METHODS
System description: The prototyped system consists of two subsystems; remote node (slave) and central node (master) each is composed of several building blocks. The architecture of the system is presented in Fig. 1.
The system can selectively, (a) captures two-channel ECG signal, store data in digital format and transfers the digitally preprocessed and compressed data continuously to a master node (PC) for real-time analysis and rapid diagnosis of Arrhythmias conditions with alarms, providing master-slave topology; Or (b) captures two-channel ECG signal, store data in digital format in addition to on-board digital filtering, QRS detection, Arrhythmia analysis calculations, advising/warning voice messages and simple LCD user interface for displaying graphs and entering user commands, providing: Stand-Alone Portable TMS320cv5509A DSP-based Arrhythmias Monitoring system.
| Fig. 1: | System block diagram |
| Fig. 2: | Central node schematic |
These two features are very important for range of clinical and diagnostic devices, as well as monitoring devices for everyday use. Several development tools have been used complete the project such; TMS320VC5509A DSK (Technical reference, 2005), Code Composer Studio v3.1, SEED-XDSusb Emulator and Insight SE-52 plus, microcontroller development kit.
Hardware design and implementation
Central node: Figure 2 show the schematic of
the central (master) node, the srwf-501 module, receives the transmitted
data. MAX232 provides the voltage levels conversion between the SRWF-501
module and the AT89C2051 microcontroller which manages the data transfer
and controls the PC interface, the FT245BM acts as USB to I/O Bridge providing
the USB2.0 interface compatibility using the 93C46 EEPROM.
Remote slave node: Figure 3 show the schematic of the slave node, the INA326 instrumentation amplifier acts as a front-end signal acquisition system, the OPA2335 provide the amplification, Anti alias filtering and feeding the TMS320VC5509A, which is an ever most power-efficient DSPs generation, with a roadmap as low as 0.05 mW/MIPS and speeds of up to 200 MHZ.
| Fig. 3: | Remote node schematic |
Then the DSP chip digitizes the signal, applies the desired processing algorithms, controls and manages the data transfer from and to the peripherals: ISD4004 voice chip, JTAG header, USB header, MD4811-512 flash memory, and the SRWF-501F915 modem.
Software design: As introduced, the prototyped system has two types of operating modes, Stand-Alone and Master-Slave. Thus the system has separate algorithms for each mode of operation. It is apparent that both modes require certain common basic support functions, therefore the software is structured modularly so these support routines; can be incorporated into any of the programs as a common operational approach, to allow minimal power consumption.
Remote node algorithms: These algorithms are TI-DSP on-chip algorithms. The flowchart in Fig. 4 shows the architecture used by programs loaded into the TMS320VC5509A-DSP. The software is written in Code Composer Studio v. 3.1. Upon power-up, the DSP chip booting up from the internal flash memory, then the program initializes the LCD; waits user to input the mode type (if stand-alone); waits user to input the type of operation he/shi want to do, accordingly the DSP chip starts the needed support functions (acquire ECG signal, ADC conversion, filtering, detecting Arrhythmias, displaying real ECG signal, displaying detection report, printing, sending advising/warning messages or storing data. At the same time the DSP chip controls the peripherals to perform the suitable operation. And if it is master-slave mode; the DSP chip acquires, converts to ADC, filters, compress and transmits the ECG signal to the central node through the SRWF-501F915 modem.
Central remote node algorithms: These algorithms divided into two parts, AT89C2051 Microcontroller-based algorithms and the PC-based application algorithms. Figure 5 shows the Microcontroller program flowchart. Upon power-op the algorithm loads, initiates the MCU I/O ports, power-on the modem and provides SPI configuration, then the MCU receives the data and sends it to the PC.
| Fig. 4: | Remote node schematic algorithm flowchart |
| Fig. 5: | Microcontroller-based algorithm flowchart |
| Fig. 6: | PC-based system architecture |
Figure 6 represents the architecture of the PC-based application program; State-of-the-art tools have been used in creation of the computer system using Visual C++. transfer from and to the peripherals: ISD4004 voice chip, JTAG header, USB header, MD4811-512 flash memory, and the SRWF-501F915 modem.
Software design: As introduced, the prototyped system has two types of operating modes, Stand-Alone and Master-Slave. Thus the system has separate algorithms for each mode of operation. It is apparent that both modes require certain common basic support functions, therefore the software is structured modularly so these support routines; can be incorporated into any of the programs as a common operational approach, to allow minimal power consumption.
Remote node algorithms: These algorithms are TI-DSP on-chip algorithms. The flowchart in Fig. 4 shows the architecture used by programs loaded into the TMS320VC5509A-DSP. The software is written in Code Composer Studio v. 3.1. Upon power-up, the DSP chip booting up from the internal flash memory, then the program initializes the LCD; waits user to input the mode type (if stand-alone); waits user to input the type of operation he/shi want to do, accordingly the DSP chip starts the needed support functions (acquire ECG signal, ADC conversion, filtering, detecting Arrhythmias, displaying real ECG signal, displaying detection report, printing, sending advising/warning messages or storing data. At the same time the DSP chip controls the peripherals to perform the suitable operation. And if it is master-slave mode; the DSP chip acquires, converts to ADC, filters, compress and transmits the ECG signal to the central node through the SRWF-501F915 modem.
Central remote node algorithms: These algorithms divided into two parts, AT89C2051 Microcontroller-based algorithms and the PC-based application algorithms. Figure 5 shows the Microcontroller program flowchart. Upon power-op the algorithm loads, initiates the MCU I/O ports, power-on the modem and provides SPI configuration, then the MCU receives the data and sends it to the PC. Figure 6 represents the architecture of the PC-based application program; State-of-the-art tools have been used in creation of the computer system using Visual C++.
RESULTS AND DISCUSSION
The design has been tested many times, and proves that this wireless monitoring is reliable and sufficiently stable. System-based results versus Manual results of Arrhythmia Detection and ECG wave parameters values for five patients has been presented in Table 1. An old patient, who suffers cardiac disorder, had monitored for more than 16 h and Fig. 7 shows his ECG wave form.
Power consumption forms an important characteristic of our design; the total power consumption is determined as the total current supplied to the all VDD inputs during the normal operation of the system. An advance technical methods has been followed and considered to achieve a low power consumption, such Sleep/Idle Modes, Clock Frequency Control, Control over Unused Peripherals, Control over Unused Outputs, special Programming Techniques; Table 2 shows the total power dissipation throughout the entire Remote Node.
| Table 1: | System-based versus manual arrythmias detection parameters results |
| Total power dissipation throughout the entire remote node | |
| Fig. 7: | Arrhythmias and ECG wave result window |
| Table 2: | Remote node power dissipation (operating) |
| Table 3: | Remote node price list |
| Table 4: | Central node price list |
CONCLUSIONS
The present system provides an on-line, real time, low power, low cost (Table 3 and 4), long distance, Dual-modes arrhythmias telemonitoring, suitable for poor people in the third-world countries, where there are no telephone lines, web-based systems and GPS. The use of TMS320vVC5509A-DSP and the Microcontroller as the building block of the Dual-mode Wireless Real-time monitoring; has the benefits of intelligence, compact size, and reliability. By the aid of this highly integrated Chips, external components, and hence wirings are kept to a minimum. Further advantage of this system is its low-power consumption, which is attractive for portable applications.
ACKNOWLEDGMENT
The authors wish to thank their colleagues Dr. Ibrahim Khider and Dr. Bo Cheng for their constructive advice and help. We would also like to thank Ms. Xi Huang for her constant support and encouragement.