Abstract: Multi-chip Module High Power Led Integrated Packaging (MCM-LED) with Through Silicon Vias (TSV) structure is considered to be helpful to realize the 3D interconnection and improve the heat dissipation. Using the Finite Element Method (FEM), the heat dissipation and thermo-mechanical reliability of MCM-LED with TSV are numerically analyzed. The steady state thermal analysis of MCM-LED with different copper-filled TSV structure is proposed, respectively and corresponding temperature distribution is obtained. The influences of the junction temperature of LED on the copper-filled TSV dimension and the ratio of the area of all the copper-filled TSV to that of each LED chip are analyzed. In order to analyze the thermo-mechanical reliability, four kinds of TSV structure which include different copper-filled TSV diameter, different ratio of distance between adjacent via and via diameter, different thickness of silicon substrate and the silicon substrate with copper-unfilled TSV structure is proposed. The maximum von Mises stress of these four kinds of TSV structure is discussed, respectively and the influence law of thermal stress by the silicon substrate with TSV structure.
INTRODUCTION
According to DOE’s Solid-State Lighting Research and Development Multi-Year Program Plan, high power LED has been identified as the typical green lighting source and is penetrating into lighting industry, especially on outdoor lighting, interior lighting and special lighting (DOE, 2010). In order to enhance the luminous flux of LED light source for the practical application, multi-chip module high power LED integrated packaging (MCM-LED) is developed. However, on the current market, the electro-optical conversion efficiency of high power LED chip is only about 20% and excess input power has transferred and inevitably generated redundant heat, which ultimately increases junction temperature. Therefore, thermal management is the key technology to the advancement of the reliable MCM-LED.
The Through Silicon Vias (TSV) structure for advanced 3D interconnection has been proposed in IC technology (Lau, 2011). Based on the copper-filled TSV structure, to some extent the heat dissipation performance of MCM-LED can be improved. While, attributing to the thermal expansion coefficients between different materials especially on copper and silicon, the thermo-mechanical reliability of copper filled TSV structure should be studied to analyze the large thermal stress on the interface of two materials.
Some reports about the heat dissipation and thermo-mechanical reliability analysis of copper-filled TSV structure have been revealed. Ryu et al. (2010) who analysis indicated that the stress of interfacial delamination is a potential failure mechanism for the TSV structure, the effects of the TSV dimensions on the interfacial reliability are elucidated. Cao et al. (2011) investigated the temperature distribution of Conventional Chip (CC) and Vertical Chip (VC) LED with TSV and numerically analyzed the von Mises thermal stress across the TSV where copper is filled. Synopsys Inc. made a research about TSV impact on the LED thermal management and pointed out that as the area ratio between TSV and chip increased, the junction temperature will decline rapidly; while the distance of TSV from a heat source exerted an important influence on the junction temperature (Ni et al., 2010).
In this study, the MCM-LED module with the copper-filled TSV structure is built by the array of high power flip chip GaN-based LED chips in a small package. Aiming at the thermal management of MCM-LED with TSV, steady state thermal analysis of MCM-LED with TSV and thermal stress of different copper-filled TSV structure are analyzed, respectively by Finite Element Method (FEM) simulation.
METHODOLOGY
Based on numerical analysis method and the prototype of MCM-LED with copper-filled TSV, a 3D finite element model is developed by ANASYS 10.0. The MCM-LED module includes a 3x3 GaN-based flip chip LED (FC-LED) array which is bonded on the same silicon substrate and some copper-filled TSV structures are set by the gold bumps. The size of GaN-based FC-LED is 35 mil. LED chip spacing is 0.5 mm and the diameter of bump is 80 μm. The bonding layer material is Sn63Pb37 and the thickness of bonding layer is 20 μm (Zhang et al., 2011). In order to reduce the complexity of mesh generation and improve operation speed, some measures have been taken. Initially, considering symmetry of the structural prototype of MCM-LED with copper-filled TSV, a quarter of 3D finite element model is only established, meanwhile the heat dissipation system of MCM-LED is simplified.
| Table 1: | Materials parameters of MCM-LED |
aC: Specific heat, bE: modulus of elasticity,
cCTE: Coefficient of thermal expansion |
|
| Fig. 1: | Finite element model of MCM-LED |
Subsequently, the external heat sink is omitted in the finite element model and the equivalent air convection coefficient is loaded on the bottom surface of internal copper slug. Finally, owing to a relative small dependence of heat dissipation on some structures that including phosphor layer, filler and chamfer, so these structures are omitted. The finite element model is shown in Fig. 1 and the materials parameters about heat transfer are listed in Table 1.
RESULTS AND DISCUSSION
Results and analysis of steady state
Thermal analysis of steady state: Both the initial temperature and ambient
temperature are set at 25°C. It is assumed that each FC-LED chip power is
1 W and the electro-optical conversion efficiency of high power FC-LED chip
is about 27%. Therefore, the heat generating of each FC-LED chip is 2.639x1010
W m-3. The numerical simulation results show that in the condition
of nature convection, the temperature which balances on the external heat sink
is about 20°C. Aiming at the structure of internal copper slug, the equivalent
air convection coefficient is about 1234 W (m2k)-1 (Kailin
et al., 2011).
When the diameter of copper-filled TSV is 100 μm, the temperature distribution of MCM-LED with copper-filled TSV structural is shown in Fig. 2. The simulation result reveals that the maximum temperature is 53.293°C on the LED chip and the minimum is 44.171°C on the bottom surface of internal copper slug. When the diameter of copper-filled TSV is 100 μm, the temperature distribution of silicon substrate and copper-filled are shown in Fig. 3. From the FEM results of Fig. 3a and b, 9 TSVs are set in the silicon substrate on the bottom of each FC-LED chip and the temperature near TSV is higher than the far. It shows that heat dissipation of the silicon substrate is enhanced because of the copper-filled TSV structure.
| Fig. 2: | Temperature distribution of FEM simulation |
| Fig. 3(a-b): | Temperature distribution of silicon substrate with copper-filled TSV structure, (a) Silicon substrate with TSVs and (b) Copper-filled |
In order to analyze the effect of copper-filled TSV dimensions on the heat dissipation, the copper-filled TSV diameter has an increasing with 10 μm from 60-140 μm. The junction temperatures of LED chip with 9 TSVs are numerically calculated by FEM simulation. The FEM results are shown in Fig. 4a. Firstly, the junction temperatures decrease as the copper-filled TSV diameter increases. Secondly, in comparison with the temperature difference between the copper-filled TSV diameter from 60-100 μm and the copper-filled TSV diameter from 100-140 μm he difference can basically indicate that the junction temperatures descend slightly as the copper-filled TSV diameter increases and when the TSV diameter increases to 120 μm, the junction temperature changes little as the copper-filled TSV diameter increases.
In practical application of LED light source, with the change of LED chip size, such as 35, 40 and 45 mil, the selection of TSV diameter is a key technology problem. Aiming at solving the problem, the effect of the area ratio of the full copper-filled TSV for each LED chip on the heat dissipation is further analyzed. The simulation results are shown in Fig. 4b. Firstly, the junction temperatures decrease with the area of the full copper-filled TSV increases. Secondly, the drop of junction temperature is far more obvious in area ratio from 0.03-0.07 and in the area ratio from 0.07-0.11, the drop of junction temperature is more obvious and in the area ratio from 0.11-0.15, the drop is less obvious.
| Fig. 4(a-b): | Copper-filled TSV dimensions and area ratio of TSV to that of each LED chip on the impact of heat dissipation, (a) Junction temperatures-Dimensions of copper-filled TSV and (b) Junction temperatures-Area ratio of the full copper-filled TSV to that of each LED chip |
| Fig. 5(a-b): | Steady state thermal stress distribution of silicon substrate with copper-filled TSV structure, (a) Front of the substrate and (b) Back of the substrate |
However, due to the mismatch of thermal expansion Coefficients (CET) between copper-filled (CTE of copper is 2.8x10-6 K-1) and silicon (CTE of silicon is 17.2x10-6 K-1), the thermal stress on the interface of the two materials is further analyzed.
Thermal stress analysis of steady state: Based on the steady state heat dissipation analysis, the steady state Thermal stress analysis is proposed by changing element type SOLID 70 into SOLID 45. The thermal stress distribution of silicon substrate with copper-filled TSV structure is calculated by the finite element numerical simulation, as shown in Fig. 5a and b. The numerical simulation results indicate that the region of large thermal stress stay at the interface between the copper-filled and silicon substrate.
RESULTS AND ANALYSIS OF THERMAL STRESS
Based on the steady state thermal stress analysis results of copper-filled TSV which diameter is 100 μm, the thermal stress analysis of the different copper-filled TSV structures is proposed. In order to study the thermal stress of the different copper-filled TSV structures conveniently, a 1/4 3D FEM of silicon substrate with copper-filled TSV structure is established by the ANSYS software. In the view of several different structures that include different copper-filled TSV diameter, different ratio of distance between adjacent via and via diameter, different thickness of silicon substrate and the silicon substrate with copper-unfilled TSV structure, the thermal stress of these several cases are numerically calculated, respectively in the positive thermal loading-40-125°C (ΔT = 165°C).
Thermal stress results and analysis of different copper-filled TSV diameter: With the condition of distance between adjacent via p = 300 μm and thickness of silicon substrate H = 250 μm, the value of different copper-filled TSV diameter is 50, 60, 75, 100 and 120 μm and the corresponding value of different ratio of distance between adjacent via and via diameter (P/D) is 6, 5, 4, 3 and 2.5, respectively. The numerical simulation results are shown from Fig. 6a-d through the FEM of the positive thermal loading ΔT = 165°C and the maximum von Mises stress is summarized in the Table 2.
| Fig. 6(a-f): | Thermal stress distribution of different copper-filled TSV diameter, (a) 50 μm, (b) 75 μm, (c) 100 μm (d) 120 μm, (e) 60 μm and (f) Thermal stress change along the line at 60 μm |
| Fig. 7: | Maximum von Mises stress of different thickness of silicon substrate |
| Table 2: | Maximum von Mises stress of different copper-filled TSV diameter |
eD: Diameter of vias; fP: Condition of distance between adjacent via; gH: Thickness of silicon substrate; hP/D: Corresponding value of different ratio of distance between adjacent via and via diameter | |
The simulation results reveal that the maximum von Mises stress goes up with the copper-filled TSV diameter increasing and the region of large thermal stress locates on the interface between the copper-filled and silicon substrate. Aiming at the value of P/D, the increasing of the maximum von Mises stress is obvious when the value of P/D becomes less than 3 and the increasing of the maximum von Mises stress is less obvious when the value of P/D is more than 3. Figure 6e shows a line, it is set at the interface between the copper-filled and silicon substrate to observe the thermal stress changes. As shown in Fig. 6f, the thermal stress along the line reveals a transition from minimum stress at the center of interface to maximum stress at the both sides of surface.
Thermal stress results and analysis of different thickness of silicon substrate: With the condition of distance between adjacent via., p = 250 μm and copper-filled TSV diameter D = 100 μm, the value of thickness of silicon substrate is 150, 250 and 350 μm. The maximum von Mises stress is numerically calculated, respectively and summarized in Fig. 7. From the content of the column system, the maximum von Mises stress is reduced with the thickness of silicon substrate increases and a large decreasing amount of he maximum von Mises stress is indicated at the change from 150-250 μm and the decrease is not obvious at the change of from 250-350 μm.
| Fig. 8: | Structure of silicon substrate with copper-unfilled TSV structure |
Therefore, the suitable thickness of silicon substrate is selected in the practical application by the calculation of maximum Von Mises stress at the interface between the copper-filled and silicon substrate.
Thermal stress results and analysis of the silicon substrate with copper-unfilled TSV structure: The silicon substrate with copper-unfilled TSV structure is shown in Fig. 8. The TSV diameter is 100 μm and the thickness of copper plate is 30 μm and the diameter of center via is 40 μm.
With the condition of distance between adjacent via p = 300 μm and thickness of silicon substrate H = 250 μm, the numerical simulation result is shown in Fig. 9. Firstly, the region of large thermal stress locates on the interface between the copper-filled and silicon substrate, which is the same as the copper-filled TSV structure. Secondly, a line is also set at the interface between the copper plate and silicon substrate, which is shown in Fig. 9a to observe the thermal stress changes. Figure 9b indicates the thermal stress along the line demonstrates a transition from minimum stress at the both sides surface to maximum stress center of the interface. Finally, the maximum von Mises stress reaches 521 Mpa at this silicon substrate with copper-unfilled TSV structure and the maximum von Mises stress approximately decreases by 16% comparing with that of copper-filled TSV which diameter is 100 μm.
DISCUSSION
Different from previously published studies, the relationship between equivalent area and the stress-strain is not completely linear, while MCM LED with TSVs has a better performance on heat dissipation. When it comes to the cooper-filled TSV, TSV diameter and area ratio of TSV to that of each LED chip are taken into account and the most suitable value of TSV dimensions should be selected for the range of junction temperature, so as to avoid increasing the production costs since the excessive increase in the number of TSV.
| Fig. 9(a-b): | Thermal stress distribution of silicon substrate with copper-unfilled TSV structure, (a) 30 μm copper plate and (b) Thermal stress change along the line at 30 μm |
CONCLUSION
In this study, the heat dissipation and thermal-mechanical reliability of MCM-LED with TSV are analyzed by the FEM simulation numerically. The steady state thermal analysis of MCM-LED with different copper-filled TSV structure is proposed and corresponding temperature distribution is obtained. The influences of the junction temperature of LED on the copper-filled TSV dimension and the area ratio of all the copper-filled TSV to each LED chip are analyzed. Based on the steady state thermal stress analysis results of copper-filled TSV which diameter is 100 μm, the thermal stress analysis of the different copper-filled TSV structures which include different copper-filled TSV diameter, different ratio of distance between adjacent via and via diameter, different thickness of silicon substrate and the silicon substrate with copper-unfilled TSV structure are proposed. The maximum von Mises stress of these four kinds of TSV structure is discussed by FEM simulation which is meaningful to the selection of the TSV structure in the application.
ACKNOWLEDGMENTS
This study is supported by Guangxi Natural Science Fund for Distinguished Young (Grant No. 2012jjFAG0004) and Innovation Project of Guangxi Graduate Education (Grant No. YCSZ2013066).