Research Article
Generalized, Floating and Self Adjoint Differential Voltage Current Conveyor
Department of Electronics and Communications Engineering, Cairo University, Giza 12613, Egypt
Over the last few years, the advantages of using current mode circuits have made the current-mode approach very attractive to analog circuit designers. One of the most versatile current-mode building blocks is the second-generation current conveyor (CCII) introduced in 1970 (Sedra and Smith, 1970). The inverting second-generation current conveyor (ICCII) was introduced in 1999 (Awad and Soliman, 1999) as a new block to complete the current conveyor family. Several CMOS realizations of the CCII and the ICCII are available in the literature. The simultaneous use of the CCII and ICCII has demonstrated high capabilities in analog circuit design (Soliman, 2010a, b).
The differential difference current conveyor with three Y inputs and one Z+ output was introduced by Chiu et al. (1996) as a universal building block. The differential voltage current conveyor with two Y inputs and balanced Z outputs (DVCC) has been independently introduced by Elwan and Soliman (1997). The DVCC includes the CCII with its two types CCII+ and CCII- as special cases. The DVCC includes also the ICCII with its two types ICCII+ and ICCII- as special cases. Due to the importance of floating elements in active circuits new floating CCII and ICCII have been introduced recently by Soliman and Saad (2009). The pathological representation of the DVCC and of the balanced output CCII (BOCCII) using nullor and mirror elements (Awad and Soliman, 2002) was given by Saad and Soliman (2010a). The adjoint network theorem (Bhattacharyya and Swamy, 1971) is applied to different types of CCII and ICCII as demonstrated by Awad and Soliman (1999). The NAM stamp (Haigh and Redmore, 2006; Haigh et al., 2006) of the DVCC and of the BOCCII was given by Saad and Soliman (2010b) and the adjoint relations and the floatation status of different building blocks was given by Soliman (2009a, b).
In this study a review of different types of the DVCC is given with their pathological realizations. The NAM stamp and floatation status are also included.
DVCC WITH TWO Y INPUTS
Three types of the DVCC with two Y inputs are considered in this section.
Single Z-output DVCC (DVCC-): The DVCC-is shown symbolically in Fig. 1a and is defined by:
(1) |
The DVCC-includes both the CCII- and ICCII- as special cases and they are all floating elements. The NAM stamp of the DVCC- is given by:
(2) |
The pathological representation of the DVCC-using two Voltage Mirrors (VM) and two norators is shown in Fig. 1b.
Table 1 includes the definition and the symbol of each of the four pathological elements that are used throughout the study.
Balanced Output DVCC (BODVCC): The BODVCC is shown symbolically in Fig. 2a and is defined by:
(3) |
Fig. 1a: | DVCC; symbol |
Table 1: | Summary of the definitions and symbols of the pathological elements |
Fig. 1b: | DVCC; Pathological representation |
The pathological representation of the BODVCC using two-Current Mirrors (CM), two VM, one nullator and one norator is shown in Fig. 2b. It should be noted that the nullator and the norator used are dummy.
The NAM stamp for the BODVCC is given by:
Fig. 2a: | Symbolic representation of BODVCC |
Fig. 2b: | Pathological representation of the BODVCC |
(4) |
The above NAM is symmetrical indicating that the BODVCC is self-adjoint. It is seen however that the BODVCC is not a floating building block.
Floating DVCC (FDVCC): The FDVCC is shown symbolically in Fig. 3a and is defined by:
(5) |
Fig. 3a: | Symbolic representation of the floating DVCC |
Fig. 3b: | Pathological representation of the floating DVCC |
The pathological representation of the FDVCC, which differs slightly from that of the BODVCC, is shown in Fig. 3b. The NAM stamp for the FDVCC is given by:
(6) |
The above NAM indicates that the FDVCC is not self-adjoint. It is seen however that the sum of the elements in each column is zero indicating that the FDVCC is a floating building block.
GDVCC WITH THREE Y INPUTS
The GDVCC is shown symbolically in Fig. 4a and is similar to Fig. 3a except that it has a third noninverting Y input. The voltage at terminal X is related to the three inputs at terminals Y by:
(7) |
The currents at the Z terminals are related to the current at terminal X by:
(8) |
The NAM of the floating GDVCC is given by:
(9) |
Fig. 4a: | Symbolic representation of the floating GDVCC |
Fig. 4b: | Pathological representation of the floating GDVCC |
Table 2: | Properties of different types of CCII, ICCII and DVCC |
CCII is current conveyor, ICCII is inverting current conveyor and DVCC is differential voltage current conveyor, The + sign means positive and the sign means negative |
The above equation shows that the GDVCC is a self-adjoint and a floating building block.
The pathological realization of the GDVCC is shown in Fig. 4b and it includes two voltage mirrors and two current mirrors. The nullator and norator included are dummy elements as in Fig. 2b and 3b.
Table 2 summarizes the properties of different building blocks and it is seen that only the CCII- and the GDVCC shares being self-adjoint and floating at the same time.
CMOS REALIZATION OF FDVCC AND GDVCC
The CMOS circuit realizing both the FDVCC and the GDVCC as well is obtained directly from the well known DVCC (Elwan and Soliman, 1997) by adding the two MOS transistors M17 and M20 as shown in Fig. 5.
The transistor aspect ratios are given in Table 3 based on the 0.5 μm CMOS model from MOSIS. The supply voltages used are±1.5 V and VB1= 0.52 V and VB2 = 0.33 V.
The FDVCC is obtained as special case from the GDVCC by grounding Y3.
APPLICATION
As an application of the FDVCC a floating gyrator is realized using two FDVCC and two resistors as shown in Fig. 6a. This circuit is a modification to the gyrator given (Elwan and Soliman, 1997) by using two FDVCC. The gyrator equations are given by:
(10) |
For equal resistors the gyrator will be ideal.
An alternative new floating gyrator is shown in Fig. 6b and is represented by the following equation:
(11) |
The gyrator circuit of Fig. 6b is used to realize a floating inductor of magnitude 0.253 m. H by taking R1 = R2 = 1.59 kΩ and terminating port 2 by a capacitor of 100pF. The floating inductor is used to realize a maximally flat magnitude second order low-pass filter with cutoff frequency of 1 MHz using a series resistor of RS = 2.25 kΩ and CS of 100 pF. Figure 7 represents the simulated magnitude and phase responses together with the ideal responses.
Table 3: | Transistor aspect ratios of the GDVCC of Fig. 5 |
Mi : M is the Metal Oxide Semiconductor (MOS) transistor and i is its number in the CMOS circuit |
Fig. 5: | CMOS circuit of the floating GDVCC; Y1, Y2 and Y3 are the three high input impedance Y inputs. X is the low input impedance input. Z+, Z1 and Z2 are the three Z output terminals. M1 to M20 are the MOS transistors |
Fig. 6a: | A floating gyrator using two FDVCC |
Fig. 6b: | Alternative floating gyrator using two FDVCC |
Fig. 7: | Simulation results of a lowpass filter using gyrator of Fig. 6b. The red curve is the ideal response and the blue curve is the actual response |
It is shown that the BODVCC introduced by Elwan and Soliman (1997) is a self adjoint building block but not floating. The FDVCC with two Y inputs and three Z outputs is defined as a new floating building block. The GDVCC with three Y inputs and three Z outputs is a self adjoint and a floating building block.
The pathological representation of the FDVCC and the GDVCC together with their NAM stamp is given. An application of the FDVCC in realizing a floating gyrator is included. The universal CMOS circuit realizing the FDVCC and the GDVCC is also included. Spice simulation results for the proposed floating inductor used in a lowpass filter is in good agreement with the ideal response.
The NAM equations and the pathological realizations will be useful in the design automation of analogue integrated circuits (Amiri et al., 2008; Chong et al., 2007; Garcia-Ortega et al., 2007; Masmoudi et al., 2005; Tlelo-Cuautle et al., 2010).