Takialddin A. Al-Smadi
Department of Computer Science, Jerash Private University, Jordan
Yasir K. Ibrahim
Department of Computer Science, Jerash Private University, Jordan
ABSTRACT
Any physical methods logic circuit design is based on using formal models of gates and wires. The simplest model of a gate is determined by only two parameters: (a) Boolean function is to be calculated, (b) fixed propagation delay. The simplest model of a wire is an ideal medium with zero resistance and consequently, with zero delay. In this study we propose an approach based on the physical nature of transitions in CL, using this idea for the design of speed independent ripple carry adder. We believe that each transition is actually a transfer of energy which can be naturally detected by physical methods.
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How to cite this article
Takialddin A. Al-Smadi and Yasir K. Ibrahim, 2007. Design of Speed Independent Ripple Carry Adder. Journal of Applied Sciences, 7: 848-854.
DOI: 10.3923/jas.2007.848.854
URL: https://scialert.net/abstract/?doi=jas.2007.848.854
DOI: 10.3923/jas.2007.848.854
URL: https://scialert.net/abstract/?doi=jas.2007.848.854
REFERENCES
- Izosimov, O.A., I.I. Shagurin and V.V. Tsylyov, 1999. Physical approach to CMOS module self-timing. Elect. Lett., 26: 1835-1836.
Direct Link - Stelling, P.F., C.U. Martel, V.G. Oklobdzija and R. Ravi, 1998. Optimal circuits for parallel multipliers. IEEE Trans. Comput., 47: 273-285.
Direct Link - Yeh, W.C. and C.W. Jen, 2000. High-speed booth encoded parallel multiplier design. IEEE Trans. Comput., 49: 692-701.
Direct Link - Ohban, J., V.G. Moshnyaga and K. Inoue, 2002. Multiplier energy reduction through bypassing of partial products. Proceedings of the IEEE Asia-Pacific Conference on Circuits and Systems, Volume 2, October 28-31, 2002, Bali, Indonesia, pp: 13-17.
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