Research Article
A New Leakage Power Reduction Technique for CMOS VLSI Circuits
Amrita Vishwa Vidyapeetham, Coimbatore, Tamil Nadu, India
K. Baskaran
Government College of Technology, Coimbatore, Tamil Nadu, India
D. Krishnaveni
APS College of Engineering, Bangalore, Karnatak, India
S. Srinivasan
Thomson Reuters, Bangalore, Karnatak, India