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Research Article
 

An Optimized Balance Control for Capacitor Voltage of Modular Multilevel Converter under Max-Min Function Algorithm



M.A. Kuntian, L.I. Hua and X.U. Yu
 
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ABSTRACT

Background and Objective: In the current MMC-HCDC engineering, the average voltage of the capacitor of the converter mostly adopts the sorting class algorithm. However, under this algorithm, after re-ordering each control cycle, the sub-modules will be heavily re-switched and the switching state of the sub-modules will change frequently. As a result, the service life of the sub-modules will be reduced and the investment in MMC-HVDC engineering will increase. So, it is important to research the switching frequency of sub-modules in MMC-HVDC engineering. Materials and Methods: In current research, the sub-module switching mode is divided into three types. Only change the switching status of Dn sub-modules with the largest or smallest capacitor voltage which have been selected. Results: The sorting algorithm which was already known and the Max-Min algorithm are compared in the PSCAD/EMTDC and the sub-module switching frequency of Max-Min algorithm is reduced from 1100-262.5 Hz. Max-Min algorithm has no negative effect on the amplitude of capacitance voltage fluctuation of the sub-module. The operation period is shortened and the operation burden is reduced. Conclusion: The computation time of the Max-Min function is shorter than that of the current sorting algorithm. Compared with the sorting algorithm which was already known, the switching frequency of the Max-Min function is smaller. It provides a new optimization strategy for the capacitance uniform voltage control under the sorting algorithm commonly used in the MMC-HVDC engineering.

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  How to cite this article:

M.A. Kuntian, L.I. Hua and X.U. Yu, 2020. An Optimized Balance Control for Capacitor Voltage of Modular Multilevel Converter under Max-Min Function Algorithm. Asian Journal of Industrial Engineering, 12: 1-10.

DOI: 10.3923/ajie.2020.1.10

URL: https://scialert.net/abstract/?doi=ajie.2020.1.10
 
Copyright: © 2020. This is an open access article distributed under the terms of the creative commons attribution License, which permits unrestricted use, distribution and reproduction in any medium, provided the original author and source are credited.

INTRODUCTION

In the case of increasingly depleting fossil energy, the flexible DC transmission technology (HVDC) based on Modular Multilevel Converter (MMC) topology provides a flexible and reliable technical solution for the development of new energy. The reasonable control strategy of MMC determines whether it can run normally and stably, so it is particularly important. Many scholars at home and abroad have done a lot of research and exploration on the control strategy of MMC and the balance control of capacitor voltage of sub-module is one of the research focuses. The study of Rong et al.1 is suitable for the large number of sub-modules, for the high switching frequency of the converter and the huge amount of operation. The base method is introduced to reduce the sorting times, reduce the work burden of the converter and reduce the unnecessary switching signal. Aiming at the dynamic distribution of the voltage of the sub-modules through programmable gates array to complete the fast segmentation of the capacitor voltage2. For the converter with pulse width modulation, the switching frequency of the sub-module can be operated under the fundamental frequency condition by the cooperation of the switching signals of each sub-module3. Aiming at the problem of the switching frequency of sub-modules, a method of comparing the reference values is used4. Dividing the sub-modules into two groups for switching can effectively reduce the switching frequency of the sub-modules. For the capacitor voltage in the MMC converter, the problems of fluctuation and high switching frequency of the sub-modules are divided into different groups for processing according to the voltage division5. For engineering problems, real-time simulation and programming are used to complete the sub-block voltage equalization control.

Since MMC usually contains hundreds of sub-modules in the project, the number of IGBT in so many sub-modules is more. Frequent switching of IGBT results in huge losses and shortened life. Therefore, research on how to reduce losses and reduce the switching frequency is particularly important. In current research, a change in the number of switching of the upper and lower arm sub-modules in the front-to-back period is proposed.

MATERIALS AND METHODS

Study area: The study was started in the month of August, 2018 at the Institute of Electric Power, Inner Mongolia University of Technology and the data were collected in the month of October-December, 2019.

Figure 1 shows the MMC and sub-module structure. Each phase of the three-phase modular multilevel converter includes two upper and lower bridge arms (iC) and sub-module voltage uC, current iSM. The relationship can be expressed as6:

(1)

where, S is the switching function, S = 1 is on, S = 0 is off.

The voltage formula of the bridge arm:

(2)

where, upi with uni is the upper and lower arm voltage, Spij upij is the switching state and capacitor voltage of the high-arm sub-module, Snij unij is the switching state and capacitor voltage of the lower arm sub-module, that is, each arm voltage is supported by the sub-module capacitor voltages of all input states7.

Fig. 1: Structure of MMC converter and sub-module
  MMC: Modular multilevel converter

Fig. 2: The process of NLM

Phase voltage is:

(3)

Modulation method: The most recent level of NLM modulation used in current research is a modulation method commonly used in MMC converters, which is a low-frequency modulation, which is usually used in conjunction with a sorting algorithm. The NLM modulation is particularly suitable for multilevel converters and high-frequency converters compared with the modulation method, in a multilevel converter, it has a smaller calculation load, a relatively small workload, a lower harmonic content on the AC side and can output a better sinusoidal waveform8.

Figure 2 is the process of NLM, the us-pj is the modulation wave voltage of the upper arm and the us-nj is the modulation wave voltage of the lower arm. It can get the number of sub-modules that should be put into on each arm by dividing sub-module rated voltage9. This process is the NLM, which can only determine the number of sub-modules switched, but cannot determine which sub-modules are switched, which need to be matched with the Algorithm for Capacitor Voltage Balance Control10.

Max-min function algorithm: Although the current sub-module capacitor voltage balance control strategy can effectively control the capacitor voltage balance of the sub-modules, the high switching frequency has always been a difficult problem to solve11, because it controls the sub-module capacitor voltage in each cycle. After sorting, a large number of sub-modules will be switched on and off again, resulting in a high switching frequency and the switching loss will increase accordingly. Therefore, as the core of the switching principle of the sub-module, the optimization of the capacitor voltage balance control strategy is particularly important12,13.

Based on the sorting algorithm which was already known, current research uses a capacitor voltage balance control algorithm based on the max-min value function (Program A), only the sub-modules with the largest or smallest capacitor voltages are changed to change their switching status.

The core content of the algorithm includes:

The core 1: In order to make as few sub-modules as possible to change the switching state in each control cycle, it is necessary to follow np (or nn) the unit climbs or descends and the switching event traverses each level of MMC. In order to meet the above requirements, the sampling period of the controller must be lower than the shortest period between two adjacent switching events, which must follow formula of Eq. 4:

(4)

where, ω is the grid angular frequency, TS is the sampling period. The N is bigger and Δt is smaller.

The core 2
Sub-module selection method: Switching change according to the number of bridge arm sub-modules Δn different, the switching of the sub-module can be divided into three working modes, as follows:

Working mode 1: The change of switching number of each bridge arm sub-module Δn>0 when selecting the Δn sub-module, the bridge arm current is positive (or negative), the sub-module is charged (discharged) and the capacitor with the smallest (or maximum) capacitor voltage is selected in the bypassed sub-module Δn make investments
Working mode 2: Number of input sub-modules Δn<0 the bridge arm current is positive (or negative) and the sub-module is charged (discharged). Select the largest (or the smallest) capacitor voltage among the sub-modules that have been put in Δn resection
Working mode 3: When the number of input sub-modules does not change, that is, Δn = 0, the bridge arm current is positive (or negative), the sub-module is charged (discharged), when the capacitor voltage in the input state is the largest (or minimum) sub-module and the capacitor module in the cutoff state is the smallest (or maximum). When the absolute value of the voltage difference between the two exceeds the set threshold, it is replaced, otherwise the original state is maintained

Figure 3 shows the flow chart of the capacitor voltage balance control algorithm based on the Max-Min function. Δn>non (t)-non (t-Δt), non (t) is the number of sub-modules that need to be in the current cycle, non (t-Δt) is the number of sub-modules that need to be in the previous cycle, ipn is the bridge arm current and |ΔU| is the absolute value of the voltage difference between the sub-module with the largest (or minimum) capacitor voltage in the input state and the sub-module with the smallest (or maximum) capacitor voltage in the cut-off state, ΔUref is the decision threshold.

Fig. 3: Flowchart of capacitor voltage balance algorithm based on max-min function

Program A: Max-Min function algorithm (Fortran)




RESULTS

A two-terminal 201-level MMC-HVDC transmission model is built in PSCAD/EMTDC as shown in Fig. 4. Its two-terminal AC system is active system it is used to simulate the operation of the MMC-HVDC system.

Table 1 is the simulation parameters of MMC-HVDC system. It is designed according to the relationship between voltage level, capacity and distance of HVDC transmission system. Table 2 is the parameters of controller. Fixed DC voltage control and fixed reactive power control are adopted on MMC1 side. Fixed active power control and fixed reactive power control are adopted on MMC2 side.

In order to verify the effectiveness of the capacitor voltage balance control under the maximum value function, the capacitor voltage balance control of the current sequencing algorithm and the proposed algorithm were simulated and verified, respectively.

Figure 5 is the capacitor voltage of sub-module under sorting algorithm which was already known. Figure 6 is the capacitor voltage of sub-module under the max-min function algorithm. By comparing Fig. 5 and 6, it was found that the max-min function algorithm cause the capacitance of the sub-module with the largest capacitor voltage to have a deviation, but the deviation is low and it has little effect on the converter voltage. This is because the energy stored in the sub-module is proportional to the square of its voltage.

Table 1: Simulation parameters of MMC-HVDC system

Table 2: Parameters of controller

Fig. 4: MMC-HVDC system structure

Fig. 5:
Capacitor voltage of sub-module under sorting algorithm which was already known

Fig. 6: Capacitor voltage of sub-module under the max-min function algorithm

Fig. 7: Switching frequency of sub-module under sorting algorithm which was already known

Fig. 8: Switching frequency of sub-module under the max-min function algorithm

Table 3: Trigger frequency of the sub-modules under the two algorithms

Figure 7 is the switching frequency of sub-module under sorting algorithm which was already known. Figure 8 is the switching frequency of sub-module under the max-min function algorithm. As is shown in Fig. 7 and 8, the switching frequency of sub-module under the max-min function algorithm decreased obviously in 4 cycles (1 cycle is 0.02 sec). Through a large number of experiments and collected relevant data. It can be seen in Table 3 that the average switching frequency of sub-module under the max-min value function capacitor voltage balance control is reduced from 1100-262.5 Hz.

DISCUSSION

In May, 2006, State Grid Corporation of China established the Research Framework on the Key Technologies of HVDC System. Then the first MMC-HVDC test project in China was completed in 200814. The key technology of MMC-HVDC (the control strategy of MMC converter) is not perfect, especially the fluctuation limit of capacitance voltage, the switching frequency of sub-module and the protection control of MMC.

Based on the multiple studies that were read while conducting this study, one of them was based in Guan and Xu15. They studied the MMC control strategy, which can limit the switching frequency of sub-modules to some extent. Their study mainly aimed at limiting the voltage fluctuation of sub-modules, but the goal of this study is to reduce the switching frequency of sub-modules more often as is shown in Fig. 5-8 and Table 3. Wang et al.16 studied the modulation of MMC converters, which mainly focused on the application of two different modulation methods: NLM and CPS-PWM in MMC. Their study did not link the modulation mode to the capacitor voltage equalization control, but this study combined NLM modulation with capacitor voltage equalization control. The research result of Luo et al.17 showed that the calculation time of the MMC controller can be reduced effectively, which is similar to this study, both of them can reduce the operation time of the controller. This study achieved the goal of reducing the calculation time of the controller through the core algorithm 1, but their study achieved this goal by grouping the sub-modules. Chang et al.18 studied the capacitance equalization problem, which used FPGA (Field-Programmable Gate Array) to sort the capacitance voltage of the sub-module in real time. So that the operation time of the controller does not increase with the increase of the number of sub-modules, but also reduces the switching frequency of the sub-module. There were various similarities in the results; both of them can reduce the operation time of the controller and reduce the switching frequency of the sub-module at high level. The difference is that the operation time of the controller in this study is fixed. When the number of levels is low, the operation time of the controller in their study is higher than that in this study. So, it is only suitable for high level converters. A theory of closed-loop charging strategy for MMC sub-modules is proposed by Zhang et al.19. Their study has a good auxiliary role for this study. It helps to speed up the operation of MMC into the phase of sub-module capacitance voltage control.

The current research focuses on the problem of high switching frequency of the MMC-HVDC converter. On the one hand, it can effectively reduce the switching frequency and improve the life of the IGBT. On the other hand, it reduces the operation time of the MMC controller. As the direct current transmission system develops towards high voltage and high power, if there is no significant breakthrough in the future research on IGBT withstand voltage, then only by continuously optimizing the control strategy of the MMC converter can the stable control of the capacitance voltage be completed with the increasing number of sub-modules.

CONCLUSION

In current research, the sub-module switching mode is divided into three types. Only change the switching status of Δn sub-modules with the largest or smallest capacitor voltage which have been selected. Advantages of the capacitor voltage balance control strategy under the max-min function algorithm. The work mode has been optimized. The calculation of the max-min value function takes less time than the sorting algorithm which was already known. Compared with the sorting algorithm which was already known, each control cycle basically only changes the switching state of a very small number of sub-modules. Ensuring extremely low IGBT tube switching frequency provides a new optimization strategy for capacitor voltage equalization control under the sequencing algorithm commonly used in MMC-HVDC engineering, which can extend the service life of IGBT tubes in MMC systems and reduce investment.

SIGNIFICANCE STATEMENT

This study discover the max-min function can effectively reduce the switching frequency of sub-module in MMC-HCDC project, that can be beneficial for raising the service life of IGBT in the sub-module. So, that the cost of this link of MMC-HVDC project can be reduced. At the same time, there is no negative effect on the fluctuation amplitude of the capacitance voltage of the sub-module. In addition, the operation time of the algorithm is relatively broken and the workload is small. This study will help the researcher to uncover the critical areas of balance control for capacitor voltage of MMC that many researchers were not able to explore. Thus, a new theory on balance control for capacitor voltage of MMC may be arrived at.

ACKNOWLEDGMENT

Thanks to the teachers of Inner Mongolia University of Technology, for their permission and encouragement during their research work.

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