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Articles by M. Azaga
Total Records ( 1 ) for M. Azaga
  M. Azaga and M. Othman
  A proposed design of Ultra Wideband (UWB) pulse generator circuit is presented. The design is based on Source Couple Logic (SCL) for its low power and high immune to noise so it can be used in mixed signal ICs environment. The pulse is digitally generated by using SCL inverters and NAND gates; the output of clock pulse input is dual pulse signals opposite to each other. The design is simulated and result of the circuit is dual pulses with width of sub-nanosecond. The results gotten have satisfied the design idea as desired. Post simulation has been carried out by using HSPICE, the layout is done using Cadence Virtuoso and verification is done by Mentor Graphic Interactive tool. All simulations are based on MIMOS 0.35 μm process PDK.
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