M. Geetha Priya
Amrita Vishwa Vidyapeetham, Coimbatore, Tamil Nadu, India
K. Baskaran
Government College of Technology, Coimbatore, Tamil Nadu, India
D. Krishnaveni
APS College of Engineering, Bangalore, Karnatak, India
S. Srinivasan
Thomson Reuters, Bangalore, Karnatak, India
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How to cite this article
M. Geetha Priya, K. Baskaran, D. Krishnaveni and S. Srinivasan, 2012. A New Leakage Power Reduction Technique for CMOS VLSI Circuits. Journal of Artificial Intelligence, 5: 227-232.
DOI: 10.3923/jai.2012.227.232
URL: https://scialert.net/abstract/?doi=jai.2012.227.232
DOI: 10.3923/jai.2012.227.232
URL: https://scialert.net/abstract/?doi=jai.2012.227.232