Sundararaman Rajagopalan
Faculty, School of Electrical and Electronics Engineering, SASTRA University, Thanjavur-61340, India
K. Pravallika
Tata Consultancy Services, Chennai, India
R. Radha
Tata Consultancy Services, Chennai, India
Har Narayan Upadhyay
Faculty, School of Electrical and Electronics Engineering, SASTRA University, Thanjavur-61340, India
J.B.B. Rayappan
Faculty, School of Electrical and Electronics Engineering, SASTRA University, Thanjavur-61340, India
Rengarajan Amirtharajan
Faculty, School of Electrical and Electronics Engineering, SASTRA University, Thanjavur-61340, India
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Sundararaman Rajagopalan, K. Pravallika, R. Radha, Har Narayan Upadhyay, J.B.B. Rayappan and Rengarajan Amirtharajan, 2014. Stego on Song-an Amalgam of vi and FPGA for Hardware Info Hide. Information Technology Journal, 13: 1992-1998.
DOI: 10.3923/itj.2014.1992.1998
URL: https://scialert.net/abstract/?doi=itj.2014.1992.1998
DOI: 10.3923/itj.2014.1992.1998
URL: https://scialert.net/abstract/?doi=itj.2014.1992.1998