M . Kannan
Department of Electronics Engineering, MIT Campus, Anna University, Chromepet, Chennai-44, Tamil Nadu, India
S.K . Srivatsa
Department of Electronics Engineering, MIT Campus, Anna University, Chromepet, Chennai-44, Tamil Nadu, India
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M . Kannan and S.K . Srivatsa, 2006. Hardware Implementation of Instruction Level Parallel Architecture Incorporating Special Functional Units for Image Processing Algorithms. Information Technology Journal, 5: 416-421.
DOI: 10.3923/itj.2006.416.421
URL: https://scialert.net/abstract/?doi=itj.2006.416.421
DOI: 10.3923/itj.2006.416.421
URL: https://scialert.net/abstract/?doi=itj.2006.416.421