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Asian Journal of Scientific Research
  Year: 2014 | Volume: 7 | Issue: 2 | Page No.: 248-255
DOI: 10.3923/ajsr.2014.248.255
 
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Low Energy, Low Power Adder Logic Cells: A CMOS VLSI Implementation

S. Hari Hara Subramani, K.S.S.K. Rajesh and V. Elamaran

Abstract:
The importance of adder sub-systems are well known by every designers and engineers. Hence the engineers are still doing research with them by incorporating novel design techniques to speed up the circuit along with power reduction. Adder logic-cells are used in many applications like within a microprocessors, digital signal processors, etc., especially where the digital data is being processed. A Complementary Metal Oxide Semiconductor (CMOS) design techniques are implemented here with different logic styles. We implement some novel design ideas which will have less number of transistors along with variable length and width of the transistors to implement the addition. Reduction of clock frequency, supply voltage and the load capacitance are the pertinent techniques to reduce the dynamic power dissipation. Methods like clock gating, transistors with high thresholds, increasing the length of the transistors are few techniques to reduce the static power dissipation. We simulate our adder logic-cell designs using DSCH (Digital Schematic) Computer Aided Design (CAD) tool. A Microwind which is a Layout Editor tool is used to acquire better results of power dissipation and they are compared along with the conventional CMOS logic, Pass-transistor logic, Transmission-gate logic styles. We conclude pass-transistor logic based results are better as compared to the other designs. All simulation results are made using 90 nm foundry technology libraries using Microwind software tool. Our work will be further extended by designing novel XOR/XNOR circuits for the improvement of power reduction of the adder logic-cells.
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How to cite this article:

S. Hari Hara Subramani, K.S.S.K. Rajesh and V. Elamaran, 2014. Low Energy, Low Power Adder Logic Cells: A CMOS VLSI Implementation. Asian Journal of Scientific Research, 7: 248-255.

DOI: 10.3923/ajsr.2014.248.255

URL: https://scialert.net/abstract/?doi=ajsr.2014.248.255

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