INTRODUCTION

Today’s growing demand for high performance processing and computing has continued significantly and increased exponentially for ultrafast signal processing. Many electronic components have been improved and reached the very small scale device, which can approach the very short distance and time requirements. Therefore, the electrical signal processing can anticipate and confront the speed and bandwidth limitation in near future. Thus, the use of light signals has been proposed for signal processing instead of electrons because the electric current flows at only 10% of the speed of light. By using light, the optical components for digital processing are required to fulfill the full applications. Till date, the practical components and optical signal processing are still some years away. Many research works have shown the potential of future application for ultrafast signal processing, where various architectures, algorithm, logical and arithmetic operation have been proposed, for instance, systems of semiconductor optical amplifier (SOA) (Cong et al., 2009; Hun et al., 2002; Kim et al., 2003; Kim et al., 2005), a quantum dot (Ma et al., 2010), a terahertz optical asymmetric demultiplex (TOAD) (Poustie et al., 1999a; Roy and Gayen, 2007), cascaded micro ring resonators (Tian et al., 2011; Zhang et al., 2010), an all-optical switching (Dekkiche and Naoum, 2007), an all-optical arithmetic unit (Gayen and Roy, 2008; Roya et al., 2007), an all-optical binary counter (Poustie et al., 2000), an all-optical adder (Pahari et al., 2004; Poustie et al., 1999b). However, these systems tend to be complex and most do not lend themselves to minimization. Therefore, the search of new materials and techniques has become the challenge where the use of ring resonator system and dark-bright soliton conversion behaviors are recommended and of great interest to overcome the previous problems. In this study, we propose an all-optical circuit for logic and arithmetic operation base tree architecture which can be used for an electronic circuit replacement (Mukhopadhyay et al., 1993; Pahari et al., 2004; Peyghambarian and Gibbs, 1985; Rumelhart and McClelland, 1986). The theoretical background is also reviewed. In this concept, the simultaneous logic operation of binary based on dark-bright soliton conversion behaviors can be performed, in which the coincidence dark and bright soliton pulses can be separated after propagating into the π/2 phase shifted device (an optical coupler) (Sarapat et al., 2009). The proposed scheme is based on a 1 bit binary compared to the complex logic circuits, which can be compared by any 2 bits, when logic ‘0’ and ‘1’ use the dark and bright soliton pulses, respectively.

OPERATING PRINCIPLE

To begin this operation, we consider the dark-bright soliton conversion using add-drop filter as shown in Fig. 1 where in this case the dark-bright soliton conversion pulse (Juleang et al., 2011; Mitatha, 2009; Mitatha et al., 2009; Sarapat et al., 2009; Phatharaworamet et al., 2010) using an optical channel dropping filter (OCDF) (Absil et al., 2001; Grover et al., 2001; Van et al., 2002) is composed of two set of coupled waveguide, as shown in Fig. 1a, b when for convenience, Fig. 1b is replaced by Fig. 1a. The relative phase of the two output light signals after coupling into the optical coupler is π/2 before coupling into the ring and the input bus, respectively. This means that the signals coupled into the drop and through ports are acquired a phase of π with respect to the input port signal. In application, if the coupling coefficients are formed appropriately, the field coupled into the through port would completely extinguish the resonant wavelength (Priem et al., 2005) and all power would be coupled into the drop port, in which the dark-bright conversion behaviors are described by Eq. 1, 8:

(1)

(2)

(3)

(4)

(5)

(6)

here E_i is the input field, E_a is the added (control) field, E_t is the throughput field, E_d is the dropped field, E_ra...E_rd are the fields in the ring at the point a...d, k₁ is the field coupling coefficient between the input and the ring, k₂ is the field coupling coefficient between the ring and the output bus, L is the circumference of the ring (2πR), T is the time taken for one round trip, T = Ln_eff/c and α is the power loss in the ring per unit length.

Fig. 1(a-b):	(a) Add/drop filter, (b) Modified add/drop

We assume that lossless coupling, i.e., . The output power/intensities at the drop port and through port are given by:

(7)

(8)

here, A_1/2 = exp(-αL/4) (the half-round-trip amplitude), A = A²_1/2, Φ_1/2 = exp(jωT/2) (the half-round-trip phase contribution) and φ = φ²_1/2.The input and control fields at the input and add ports are formed by the dark and bright optical soliton pulses as shown in Eq. 9, 10:

(9)

(10)

here, A and z are optical field amplitude and propagation distance, respectively. T is soliton pulse propagation time in a frame moving at the group velocity T = t-β₁z where β₁ and β₂ are the coefficients of the linear and second-order terms of Taylor expansion of the propagation constant. L_D = T²₀/|β₂| is the dispersion length of the soliton pulse.

Fig. 2:	Optical tree architecture

T₀ in the equation is the initial soliton pulse width where t is the soliton phase shift time and the frequency shift of the soliton is ω₀. This solution describes a pulse that keeps its temporal width invariance as it propagates and thus is called a temporal soliton. When soliton peak intensity (β/ΓT²₀) is given, then T₀ is known. For the soliton pulse in the micro and nanoring device, a balance should be achieved between the dispersion length (L_D) and nonlinear length L_NL = (1/Γφ_NL) where Γ = n₂k₀, is the length scale over which dispersive or nonlinear effects make the beam become wider or narrower. For a soliton pulse, there is a balance between dispersion and nonlinear lengths, hence L_D = L_NL.

When, light propagates within the nonlinear material (medium), the refractive index (n) of light within the medium is given by Eq. 11:

(11)

here, n₀ and n₂ are the linear and nonlinear refractive indexes, respectively. I and P are the optical intensity and optical power, respectively. The effective mode core area of the device is given by A_eff. For the micro/nano ring resonator, the effective mode core areas range from 0.10 to 0.50 μm² (Xu et al., 2008). The resonant output of the light field is the ratio between the output and input fields [E_out (t) and E_in (t)] in each roundtrip, which is given by references (Mitatha et al., 2009).

Optical tree architecture is the multiplying system of a single straight path into several distributed branches and sub branch paths (Mukhopadhyay, 1990). This structure is show in Fig. 2. when light beam MN emitting from point M it will break into two parts NO and NP after that two beam will be break again into four parts, i.e., NO to OQ, OR and NP to PS and PT. In this way more optical output channel could be obtained from a single input light beam.

TREE ARCHITECTURE BASED ON DARK-BRIGHT SOLITON CONVERSION CONTROL

It can be used successfully for the designed all-optical base tree architecture as shown in Fig. 3. For this propose, we used three dark-bright soliton conversion MRR1, MRR2 and MRR3 as shown in Fig. 3. to be set at N, O and P, respectively. An all-optical tree architecture system is as shown in Fig. 3. When the input and control light pulse trains are input into the first add/drop optical filter (MRR1), in which the dark soliton (logic ‘0’) or the bright soliton (logic ‘1’) is formed within the device. Firstly, the dark soliton is converted to be dark and bright soliton via the add/drop (MRR1) optical filter (Mitatha et al., 2009) which they can be seen at the through and drop ports with π phase shift (Wang et al., 2009) and then it can form inverter gate (NOT gate), respectively. By using the dark-bright conversion add/drop optical filter (MRR2 and MRR3), both input signal are generated again by the first stage add/drop optical filter. In the next procedure, the input data “B” with logic “0” (dark soliton) and logic “1” (bright soliton) are added into both add ports, the dark-bright soliton conversion, in which the π phase shift is operated again. For large scale (Fig. 3), results obtained are simultaneously seen at the drop and through ports by T2, D2, T3 and D3 for optical logic operation. In Fig. 3, the optical logic operation using dark-bright soliton conversion behavior can be described as following details. When the optical pulse train A, B is fed into MRR2 by the input and add ports, respectively, the optical pulse trains that appear at the through and drop ports of MRR2 will be and , respectively, whereas the aforementioned assumption is provided. Here, the symbol represents the logic operation AND. Similarly, when the optical pulse train A, B is fed into MRR3 by the input and add ports, respectively, the optical pulse trains that appear at the through and drop ports of MRR3 will be and , respectively.

In simulation, the add/drop optical filter (Mookherjea and Schneider, 2008; Mukhopadhyay, 1990; Wang et al., 2009; Xu et al., 2008) parameters are used and fixed to be k_s = 0.5, R_ad = 3.0 μm (Mookherjea and Schneider, 2008) A_eff = 0.25 μm, α = 0.05 dB mm^-1, n_eff = 3.34 (for InGaAsP/InP), γ = 0.01 for all add/drop optical filters in the system. Results of the optical tree architecture are generated by using the dark-bright soliton conversion behaviors, with wavelength center is at λ₀ = 1.50 μm, pulse width of 35 fs and the input data logic “0” and “1” are represented by the dark and bright soliton pulses, respectively.

Fig. 3:	Dark-bright soliton conversion circuits for optical tree architecture

In Fig. 4, the simultaneous output optical logic gate is seen, which can be configured as following details:

Fig. 4(a-d):	Simulation results of the output logic gates when the input logic states are, (a) DD, (b) DB, (c) BD and (d) BB

Table 1:	Truth table of the dark-bright soliton conversion for tree architecture
D: Dark soliton = logic 0, B: Bright soliton = logic 1

Fig. 5(a-b):	(a) Schematic of a logic-gate decoder, (b) A decoder truth table

The simultaneous all-optical output is concluded in Table 1. We found that the output logic in T2 gives the result of operation, whereas D2, T3 and D3 give the result of logic A.B, , operation, respectively.

ALL-OPTICAL 2 TO 4 LINE DECODER

An all-optical 2 to 4 line decoder, there will be one line at the output for each possible input, it can converts binary information from n input line to a maximum of 2ⁿ unique output line. The 2 to 4 line decoder truth table is concluded as shown in Fig. 5b. The decoder principle can be used of AND and NOT logic operation as shown in Fig. 5a. The above optical tree can successfully be used for all-optical 2 to 4 line decoder. We found that the output data logic in the through and drop ports. The Table 1 shows that output T2 appear logic “1” when input “00” is added, then we can use T2 for decoder port D₀, D₂ appear logic “1” when input “11” is added, then we can use D2 for decoder port D₃ , T3 appear logic “1” when input “10” is added then we can use T3 for decoder port D₂ and D3 appear logic “1” when input “01” is added, then we can use D3 for decoder port D₁, respectively.

ALL-OPTICAL PARALLEL LOGIC OF TWO INPUT OPERATION

Optical tree architecture can be successful for parallel some logic operation in an all-optical domain. In Table 1 shows that the output logic at T2 gives the result of whereas D2, T3 and D3 give the result of logic A.B, , , respectively. The operation of two binary inputs is 16 logic operations. To perform all two input logic operation can be done by using a beam splitter (BS) or beam combiner (BC). To obtain the logic operation XOR we can combine T3 and D3. To obtain the logic operation of XOR we can combine T2 and D2.We can obtain logic operation by combine D2, T3 and D3. We can obtain logic operation by combine T2, D2 and D3. We can obtain logic operation by combine T2, D2 and T3. We can obtain logic operation by combine T2, T3 and D3, respectively. In this way we can similarly obtain the all-optical logic operation of two binary inputs.

ALL-OPTICAL DATA COMPARISON

The comparison between two number A and B is specified by three binary operation that is A is greater than B (A>B), where A is equal to B (A = B) and A is less than B (A<B), respectively. The data comparison truth table is concluded as shown in Fig. 6b and logic operation as shown in Fig. 6a. The above optical tree can successfully be used for all-optical scheme, which can be done by using a beam splitter (BS) or beam combiner (BC) as shown in Fig. 7. A beam splitter to be used here is not polarizing one and reflect (and transmit) 50% of the light that is incident input power. The purpose of all-optical comparator is to compare a set of variables or unknown numbers, for A against that of a constant or unknown value such as B and produce an output condition or flag depending upon the result of the comparison as shown in Fig. 7. The Table 1 shows that output T2 and D2 appear logic “1” when data input “00” and “11” is added then we can combine two port output to represent A is equal to B, the output T3 appear logic “1” when input “10” is added then we can used port T3 to represent A greater than B and the output port D3 appear logic “1” when “01” is added then we can used port T3 to represent A less than B, respectively.

SIMULTANEOUS ALL-OPTICAL HALF ADDER/SUBTRACTOR

A binary arithmetic is performed similarly to the decimal arithmetic, which is presented by the logic gate operation, which is as shown in Fig. 8a.

Fig. 6(a-b):	(a) Schematic of a logic-gate comparator, (b) A comparator truth table

Fig. 7:	All-optical data comparison

Fig. 8(a-b):	(a) Schematic of a logic-gate half adder/subtractor, (b) A half adder/subtractor truth table

For simplicity, the multiple input ports are required to perform the operation, where first of all, the required half adder/subtractor truth table is given and shown in Fig. 8b.

Fig. 9:	All-optical half adder/subtractor

For the half adder/subtractor with two binary inputs, the simplified Boolean equation is obtained, which is the sum of product for half adder and half subtractor, respectively. The simplified output of Sum and Difference can be also implemented with the XOR gate, in which the addition and subtraction operations can be combined into one circuit with one common binary adder. To generate the all-optical half adder/subtractor, it can be easily done by using a beam splitter (BS) or beam combiner (BC), as shown in Fig. 9, the same beam splitter is also used in this case.

CONCLUSION

The simultaneous all-optical logic and arithmetic operation has been proposed by using dark-bright soliton conversion system via the modified add/drop filters. By using the dark-bright soliton conversion concept, the data logic ‘0’ (dark soliton) and ‘1’ (bright soliton) using all-optical in nature can be used to form the simultaneous logic and arithmetic operation, in which the logic status results can be obtained simultaneously at the drop and through ports, respectively. Therefore, the proposed design can be used for logical circuit which is recognized as the simple and flexible system for performing the logic switching system. Moreover, such device can be extended and implemented for any higher number of input digits by a proper incorporation of dark-bright soliton conversion control based optical switches, which can be available for more advanced applications.

ACKNOWLEDGMENTS

We would like to acknowledge the AUN/SEED-Net for the fully financial support to Mr. Khanthanou Luangxaysana in higher education and thanks King Mongkut’s Institute of Technology Ladkrabang (KMITL), Bangkok, Thailand for providing the excellent research facilities.