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By this research project we hope to contribute to the automation of the reliability of complex systems with failure delay by introducing the Fault Tree (FT) technique. So, we present gates delays transformation method in a tree logic and intermediate gates delay elimination. We defined gate delay domains notion and developed a transformation algorithm of gates delays in F.T. We have considered the cases of systems with non reparable and reparable components with random and determinist failure delays. To calculate the probability of occurrence of the unwanted events in an FT, we used common laws of life expectancy to determine the distribution functions and probability density of life expectancies of system components.