This study was focused on the evaluation of present development of nanoelectronic devices and the projection of future devices, ultimately for non-planar geometry. The recent scaling of IC technology was limiting the employment of conventional, planar structure, thus implies in the wake of the research in non-classical architecture. The present status of extended planar silicon devices, including the insertion of high-k dielectric, metal gate and SOI MOSFET in the recent manufacturing process is elaborated. The alternative path in the enhancement of IC device performance, merely in the sub-50nm dimension is shown, with the role of double gate MOSFET and non-planar structure devices, including vertical FETs, is expected to take greater share, as well as several emerging nanostructures. The possibility to implement the non-planar devices generation heavily depends on the maturity of each technology and the ability to clear the obstacles in processing.